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________________general description the max767 is a high-efficiency, synchronous buck controller ic dedicated to converting a fixed 5v supply into a tightly regulated 3.3v output. two key features set this device apart from similar, low-voltage step-down switching regulators: high operating frequency and all n-channel construction in the application circuit. the 300khz operating frequency results in very small, low- cost external surface-mount components. the inductor, at 3.3? for 5a, is physically at least five times smaller than inductors found in competing solu- tions. all n-channel construction and synchronous rectifi- cation result in reduced cost and highest efficiency. efficiency exceeds 90% over a wide range of loading, eliminating the need for heatsinking. output capacitance requirements are low, reducing board space and cost. the max767 is a monolithic bicmos ic available in 20-pin ssop packages. for other fixed output voltages and package options, please consult the factory. ________________________applications local 5v-to-3.3v dc-dc conversion microprocessor daughterboards power supplies up to 10a or more ____________________________features >90% efficiency 700a quiescent supply current 120a standby supply current 4.5v-to-5.5v input range low-cost application circuit all n-channel switches small external components tiny shrink-small-outline package (ssop) predesigned applications: standard 5v to 3.3v dc-dc converters up to 10a high-accuracy pentium p54c vr-spec supply fixed output voltages available: 3.3v (standard) 3.45v (high-speed pentium) 3.6v (powerpc) _______________ordering information max767 5v-to-3.3v, synchronous, step-down power-supply controller ________________________________________________________________ maxim integrated products 1 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 fb dh lx bst gnd on ss cs top view max767 dl v cc v cc pgnd ref gnd gnd gnd n.c. gnd v cc sync ssop __________________pin configuration output 3.3v at 5a input 4.5v to 5.5v lx dl gnd max767 v cc ref 3.3 h bst dh pgnd cs fb on _________typical application circuit 19-0224; rev 3; 7/00 part temp. range pin- package max767cap 0? to +70? 20 ssop max767rcap 0? to +70? 20 ssop max767scap 0? to +70? 20 ssop pentium is a trademark of intel. powerpc is a trademark of ibm. max767c/d 0? to +70? dice* ref tol ?.8% ?.8% ?.8% ordering information continued at end of data sheet. * contact factory for dice specifications. v out (v) 3.3 3.45 3.6 max767tcap 0? to +70? 20 ssop ?.2% 3.3 evaluation kit manual follows data sheet for price, delivery, and to place orders, please contact maxim distribution at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max767 5v-to-3.3v, synchronous, step-down power-supply controller 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd .................................................................-0.3v, +7v pgnd to gnd ........................................................................ 2v bst to gnd ...............................................................-0.3v, +15v lx to bst.....................................................................-7v, +0.3v inputs/outputs to gnd (on, ref, sync, cs, fb, ss) .....................-0.3v, v cc + 0.3v dl to pgnd .....................................................-0.3v, v cc + 0.3v dh to lx...........................................................-0.3v, bst + 0.3v ref short to gnd.......................................................momentary ref current.........................................................................20ma continuous power dissipation (t a = +70?) 20-pin ssop (derate 8.00mw/? above +70?) ..........640mw operating temperature ranges: max767cap/max767_cap.................................0? to +70? max767eap/max767_eap ..............................-40? to +85? lead temperature (soldering, 10s) .................................+300? parameter oscillator frequency dh sink/source current min typ max 1 260 300 340 units ss source current a 2.50 4 6.5 (bst - lx) = 4.5v, dh = 2v dl on resistance ? current-limit voltage 200 7 80 100 120 mv v cc fault lockout voltage ? 3.80 4.20 khz v line regulation high or low 0.1 % oscillator sync range ss fault sink current dh on resistance 2 ma 7 3.24 3.30 3.36 ? 240 350 khz sync high pulse width v cc standby current high or low, (bst - lx) = 4.5v 120 200 200 ? v cc quiescent current ns 0.7 1.0 ma sync low pulse width 200 ns sync rise/fall time output voltage (fb) 200 ns oscillator maximum duty cycle v cc input supply range 89 92 4.5 5.5 v 95 % input low voltage 3.17 3.35 3.46 v 0.8 v input high voltage 2.40 3.32 3.50 3.60 v cc - 0.5 v input current ? ? dl sink/source current 1 a conditions sync = 3.3v sync = 0v or 5v cs - fb falling edge, hysteresis = 1% v cc = 4.5v to 5.5v max767, max767r, max767s on = 0v, v cc = 5.5v fb = cs = 3.5v not tested sync = 3.3v sync = 0v sync, on on 0mv < (cs - fb) < 80mv, 4.5v < v cc < 5.5v (includes load and line regulation) sync sync, on = 0v or 5v dl = 2v load regulation 2.5 % (cs - fb) = 0mv to 80mv 3.46 3.65 3.75 max767r max767s max767, max767t electrical characteristics (v cc = on = 5v, gnd = pgnd = sync = 0v, i ref = 0ma, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) reference voltage (ref) 3.26 3.30 3.34 v max767t
max767 5v-to-3.3v, synchronous, step-down power-supply controller _______________________________________________________________________________________ 3 100 50 0.001 0.1 10 efficiency vs. output current (1.5a circuit) 60 max767-01 output current (a) efficiency (%) 70 80 90 0.01 1 100 50 0.001 0.1 10 efficiency vs. output current (3a circuit) 60 max767-02 output current (a) efficiency (%) 70 80 90 0.01 1 100 50 0.001 0.1 10 efficiency vs. output current (5a circuit) 60 max767-03 output current (a) efficiency (%) 70 80 90 0.01 1 100 50 0.001 0.1 10 efficiency vs. output current (7a circuit) 60 max767-04 output current (a) efficiency (%) 70 80 90 0.01 1 idle-mode waveforms i load = 300ma 3.3v output 50mv/div, ac coupled lx 5v/div 5s/div 100 50 0.001 0.1 10 efficiency vs. output current (10a circuit) 60 max767-05 output current (a) efficiency (%) 70 80 90 0.01 1 1000 0.01 0.001 1 100 switching frequency vs. percent of full load 0.1 max767-06 load current (% full load) switching frequency (khz) 1 10 100 0.01 0.1 10 sync = ref (300khz) pwm-mode waveforms i load = 5a 3.3v output 50mv/div, ac coupled lx 5v/div 1s/div __________________________________________typical operating characteristics (circuit of figure 1 (5a configuration), v in = 5v, oscillator frequency = 300khz, t a = +25?, unless otherwise noted.)
max767 5v-to-3.3v, synchronous, step-down power-supply controller 4 _______________________________________________________________________________________ _____________________________typical operating characteristics (continued) (circuit of figure 1 (5a configuration), v in = 5v, oscillator frequency = 300khz, t a = +25?, unless otherwise noted.) 1.5a circuit load-transient response 200s/div 1.5a 3.3v output 50mv/div ac-coupled 0a load current 3a circuit load-transient response 200s/div 3a 3.3v output 50mv/div ac-coupled 0a load current 5a circuit load-transient response 200s/div 5a 3.3v output 50mv/div ac-coupled 0a load current 10a circuit load-transient response 200s/div 10a 3.3v output 50mv/div ac-coupled 0a load current 7a circuit load-transient response 200s/div 7a 3.3v output 50mv/div ac-coupled 0a load current
max767 5v-to-3.3v, synchronous, step-down power-supply controller _______________________________________________________________________________________ 5 ______________________________________________________________pin description 16 name function 1 cs current-sense input: +100mv = nominal current-limit level referred to fb. 2 ss soft-start input. ramp time to full current limit is 1ms/nf of capacitance to gnd. 3 on on/o f f control input to disable the pwm. tie directly to v cc for automatic start-up. pin dl gate-drive output for the low-side synchronous rectifier mosfet 4?, 11 gnd low-current analog ground. feedback reference point for the output. 8 ref 3.3v internal reference output. bypass to gnd with 0.22? minimum capacitor. 9 sync oscillator control/synchronization input. connect to v cc or gnd for 200khz; connect to ref for 300khz. for external clock synchronization in the 240khz to 350khz range, a high-to-low transition causes a new cycle to start. 10, 14, 15 v cc supply voltage input: 4.5v to 5.5v 17 bst boost capacitor connection (0.1?) 12 n.c. no internal connection 13 pgnd power ground 18 lx inductor connection. can swing 2v below gnd without latchup. 19 dh gate-drive output for the high-side mosfet 20 fb feedback and current-sense input for the pwm output 3.3v lx dl gnd ss max767 on v cc ref l1 bst dh d2 pgnd cs fb shutdown on/off n1 n2 d1 small- signal schottky c1 r1 c3 0.1 f c2 c6 0.22 f c5 (optional) sync r2 10 ? input 4.5v to 5.5v 0.01 f c4 4.7 f figure 1. standard application circuit
max767 _____standard application circuits this data sheet shows five predesigned circuits with output current capabilities from 1.5a to 10a. many users will find one of these standard circuits appropri- ate for their needs. if a standard circuit is used, the remainder of this data sheet ( detailed description and applications information and design procedure ) can be bypassed. figure 1 shows the standard application circuit. table 1 gives component values and part numbers for five dif- ferent implementations of this circuit: 1.5a, 3a, 5a, 7a, and 10a output currents. each of these circuits is designed to deliver the full rated output load current over the temperature range listed. in addition, each will withstand a short circuit of several seconds duration from the output to ground. if the circuit must withstand a continuous short circuit, refer to the short-circuit duration section for the required changes. layout and grounding good layout is necessary to achieve the designed out- put power, high efficiency, and low noise. good layout includes the use of a ground plane, appropriate com- ponent placement, and correct routing of traces using appropriate trace widths. the following points are in order of decreasing importance. 1. a ground plane is essential for optimum perfor- mance. in most applications, the circuit will be located on a multilayer board and full use of the four or more copper layers is recommended. use the top and bottom layers for interconnections and the inner layers for an uninterrupted ground plane. 2. because the sense resistance values are similar to a few centimeters of narrow traces on a printed cir- cuit board, trace resistance can contribute signifi- cant errors. to prevent this, kelvin connect cs and fb to the sense resistor; i.e., use separate traces not carrying any of the inductor or load current, as shown in figure 2. these signals must be carefully shielded from dh, dl, bst, and the lx node. important: place the sense resistor as close as pos- sible to and no further than 10mm from the max767. 3. place the lx node components n1, n2, l1, and d2 as close together as possible. this reduces resis- tive and switching losses and confines noise due to ground inductance. 4. the input filter capacitor c1 should be less than 10mm away from n1? drain. the connecting cop- per trace carries large currents and must be at least 2mm wide, preferably 5mm. 5. keep the gate connections to the mosfets short for low inductance (less than 20mm long and more than 0.5mm wide) to ensure clean switching. 6. to achieve good shielding, it is best to keep all switching signals (mosfet gate drives dh and dl, bst, and the lx node) on one side of the board and all sensitive nodes (cs, fb, and ref) on the other side. 7. connect the gnd and pgnd pins directly to the ground plane, which should ideally be an inner layer of a multilayer board. _______________detailed description note: the remainder of this document contains the detailed information necessary to design a circuit that differs substantially from the five standard application circuits. if you are using one of the predesigned stan- dard circuits, the following sections are provided only for your reading pleasure. the max767 converts a 4.5v to 5.5v input to a 3.3v output. its load capability depends on external compo- nents and can exceed 10a. the 3.3v output is generat- ed by a current-mode, pulse-width-modulation (pwm) step-down regulator. the pwm regulator operates at either 200khz or 300khz, with a corresponding trade- off between somewhat higher efficiency (200khz) and smaller external component size (300khz). the max767 also has a 3.3v, 5ma reference voltage. fault- protection circuitry shuts off the output should the refer- ence lose regulation or the input voltage go below 4v (nominally). external components for the max767 include two n- channel mosfets, a rectifier, and an lc output filter. the gate-drive signal for the high-side mosfet, which must exceed the input voltage, is provided by a boost circuit that uses a 0.1? capacitor. the synchronous rectifier keeps efficiency high by clamping the voltage across the rectifier diode. an external low-value cur- rent-sense resistor sets the maximum current limit, pre- venting excessive inductor current during start-up or under short-circuit conditions. an optional external capacitor sets the programmable soft-start, reducing in-rush surge currents upon start-up and providing adjustable power-up time. the pwm regulator is a direct-summing type, lacking a traditional integrator-type error amplifier and the phase shift associated with it. it therefore does not require external feedback-compensation components, as long as you follow the esr guidelines in the applications information and design procedure sections. 5v-to-3.3v, synchronous, step-down power-supply controller 6 _______________________________________________________________________________________
max767 5v-to-3.3v, synchronous, step-down power-supply controller _______________________________________________________________________________________ 7 part 1.5a circuit 3a circuit 5a circuit 7a circuit 10a circuit l1 10? sumida cdr74b-100 5? sumida cdr125 drg# 4722-jps-001 3.3? coilcraft do3316-332 2.1?, 5m ? coiltronics ctx03-12338-1 1.5?, 3.5m ? coiltronics ctx03-12357-1 r1 0.04 ? irc lr2010-01-r040 or dd wsl-2512-r040 0.02 ? irc lr2010-01-r020 or dd wsl-2512-r020 0.012 ? dd wsl-2512-r012 or 2 x 0.025 ? irc lr2010-01-r025 (in parallel) 3 x 0.025 ? irc lr2010-01-r025 or dd wsl-2512-r025 (in parallel) 3 x 0.020 ? irc lr2010-01-r020 or 2 x 0.012 ? dd wsl-2512-r012 (in parallel) n1, n2 international rectifier irf7101, siliconix si9936dy or motorola mmdf3n03hd (dual n-channel) siliconix si9410dy, international rectifier irf7101 or motorola mmdf3n03hd (both fets in parallel) motorola mtd20n03hdl motorola mtd75n03hdl (n1) mtd20n03hdl (n2) motorola mtd75n03hdl c1 47?, 20v avx tpsd476k020r 2 x 47?, 20v avx tpsd476k020r 220?, 10v sanyo os-con 10sa220m 2 x 100?, 10v sanyo os-con 10sa100m 2 x 220?, 10v sanyo os-con 10sa220m c2 220?, 6.3v sprague 595d227x06r3d2b 2 x 150?, 10v sprague 595d157x0010d7t 2 x 220?, 10v sanyo os-con 10sa220m 2 x 220?, 10v sanyo os-con 10sa220m 4 x 220?, 10v sanyo os-con 10sa220m d2 1n5817 nihon ec10qs02, or motorola mbrs120t3 1n5817 nihon ec10qs02, or motorola mbrs120t3 1n5820 nihon nsq03a02, or motorola mbrs340t3 1n5820 nihon nsq03a02, or motorola mbrs340t3 1n5820 nihon nsq03a02, or motorola mbrs340t3 temp. range to +85? to +85? to +85? to +85? to +85? table 1. component values table 2. component suppliers company factory fax [country code] usa telephone avx [1] (803) 626-3123 (803) 946-0690 (800) 282-4975 coilcraft [1] (847) 639-1469 (847) 639-6400 coiltronics [1] (561) 241-9339 (561) 241-7876 dd [1] (402) 563-6418 (402) 564-3131 irc [1] (512) 992-3377 (512) 992-7900 international rectifier [1] (310) 322-3332 (310) 322-3331 nihon [81] 3-3494-7414 (805) 867-2555 sanyo [81] 7-2070-1174 (619) 661-6835 siliconix [1] (408) 970-3950 (408) 988-8000 sprague [1] (603) 224-1430 (603) 224-1961 sumida [81] 3-3607-5144 (847) 956-0666 motorola [1] (602) 994-6430 (602) 303-5454
max767 the main gain block is an open-loop comparator that sums four signals: output voltage error signal, current- sense signal, slope-compensation ramp, and the 3.3v reference. this direct-summing method approaches the ideal of cycle-by-cycle control of the output voltage. under heavy loads, the controller operates in full pwm mode. every pulse from the oscillator sets the output latch and turns on the high-side switch for a period determined by the duty factor (approximately v out / v in ). as the high-side switch turns off, the synchronous recti- fier latch is set; 60ns later, the low-side switch turns on. the low-side switch stays on until the beginning of the next clock cycle (in continuous-conduction mode) or until the inductor current reaches zero (in discontinu- ous-conduction mode). under fault conditions where the inductor current exceeds the 100mv current-limit threshold, the high-side latch resets and the high-side switch turns off. at light loads, the inductor current fails to exceed the 25mv threshold set by the minimum-current compara- tor. when this occurs, the pwm goes into idle-mode, skipping most of the oscillator pulses to reduce the switching frequency and cut back switching losses. the oscillator is effectively gated off at light loads because the minimum-current comparator immediately resets the high-side latch at the beginning of each cycle, unless the fb signal falls below the reference voltage level. soft-start connecting a capacitor from the soft-start pin (ss) to ground allows a gradual build-up of the 3.3v output after power is applied or on is driven high. when on is low, the soft-start capacitor is discharged to gnd. when on is driven high, a 4? constant current source charges the capacitor up to 4v. the resulting ramp volt- age on ss linearly increases the current-limit compara- tor set-point, increasing the duty cycle to the external power mosfets. with no soft-start capacitor, the full output current is available within 10? (see applications information and design procedure section). synchronous rectifier synchronous rectification allows for high efficiency by reducing the losses associated with the schottky rectifi- er. also, the synchronous-rectifier mosfet is neces- sary for correct operation of the max767? boost gate- drive supply. when the external power mosfet (n1) turns off, ener- gy stored in the inductor causes its terminal voltage to reverse instantly. current flows in the loop formed by the inductor (l1), schottky diode (d2), and the load an action that charges up the output filter capacitor (c2). the schottky diode has a forward voltage of about 0.5v which, although small, represents a signifi- cant power loss and degrades efficiency. the synchro- nous-rectifier mosfet parallels the diode and is turned on by dl shortly after the diode conducts. since the synchronous rectifier? on resistance (r ds(on) ) is very low, the losses are reduced. the synchronous-rectifier mosfet is turned off when the inductor current falls to zero. the max767? internal break-before-make timing ensures that shoot-through (both external switches turned on at the same time) does not occur. the schottky rectifier conducts during the time that neither mosfet is on, which improves efficiency by preventing the synchronous-rectifier mosfet? lossy body diode from conducting. the synchronous rectifier works under all operating conditions, including discontinuous-conduction mode and idle-mode. 5v-to-3.3v, synchronous, step-down power-supply controller 8 _______________________________________________________________________________________ max767 sense resistor main current path fat, high-current traces figure 2. kelvin connections for the current-sense resistor idle-mode is a trademark of maxim integrated products.
max767 5v-to-3.3v, synchronous, step-down power-supply controller _______________________________________________________________________________________ 9 shoot- through control r q 60khz lpf minimum current (idle-mode) 25mv r q level shift 1x main pwm comparator level shift current limit v cc 30r 1r 3.3v 4 a synchronous rectifier control 0mv to 100mv ss on cs fb bst dh lx v cc dl pgnd s s slope comp n 200khz/300khz oscillator on +3.3v reference 2.8v 4v ref v cc fault sync max767 figure 3. max767 block diagram
max767 gate-driver boost supply gate-drive voltage for the high-side n-channel switch is generated with the flying-capacitor boost circuit shown in figure 4. the capacitor (c3) is alternately charged from the 5v input via the diode (d1) and placed in par- allel with the high-side mosfet? gate-source termi- nals. on start-up, the synchronous rectifier (low-side) mosfet (n2) forces lx to 0v and charges the bst capacitor to 5v. on the second half-cycle, the pwm turns on the high-side mosfet (n1); it does this by closing an internal switch between bst and dh, which connects the capacitor to the mosfet gate. this pro- vides the necessary enhancement voltage to turn on the high-side switch, an action that ?oosts?the 5v gate-drive signal above the input voltage. ringing seen at the high-side mosfet gates (dh) in discontinuous-conduction mode (light loads) is a natur- al operating condition. it is caused by the residual energy in the tank circuit, formed by the inductor and stray capacitance at the lx node. the gate-driver neg- ative rail is referred to lx, so any ringing there is direct- ly coupled to the gate-drive supply. modes of operation pwm mode under heavy loads?ver approximately 25% of full load?he supply operates as a continuous-current pwm supply (see typical operating characteristics ). the duty cycle, %on, is approximately: v out %on = ________ v in current flows continuously in the inductor: first, it ramps up when the power mosfet conducts; second, it ramps down during the flyback portion of each cycle as energy is put into the inductor and then discharged into the load. note that the current flowing into the inductor when it is being charged is also flowing into the load, so the load is continuously receiving current from the inductor. this minimizes output ripple and maximizes inductor use, allowing very small physical and electrical sizes. output ripple is primarily a function of the filter capacitor? effective series resistance (esr), and is typically under 50mv (see design procedure section). idle-mode under light loads (<25% of full load), the max767 enhances efficiency by turning the drive voltage on and off for only a single clock period, skipping most of the clock pulses entirely. asynchronous switching, seen as ?hosting?on an oscilloscope, is thus a normal operat- ing condition whenever the load current is less than approximately 25% of full load. at certain input voltage and load conditions, a transition region exists where the controller can pass back and forth from idle-mode to pwm mode. in this situation, short pulse bursts occur, which make the current wave- form look erratic but do not materially affect the output ripple. efficiency remains high. current limiting the voltage between cs and fb is continuously moni- tored. an external, low-value shunt resistor is connect- ed between these pins, in series with the inductor, allowing the inductor current to be continuously mea- sured throughout the switching cycle. whenever this voltage exceeds 100mv, the drive voltage to the exter- nal high-side mosfet is cut off. this protects the mos- fet, the load, and the input supply in case of short cir- cuits or temporary load surges. the current-limiting resistance is typically 20m ? for 3a. 5v-to-3.3v, synchronous, step-down power-supply controller 10 ______________________________________________________________________________________ level translator pwm c1 v in bst dh lx dl n1 d1 c3 n2 l1 v cc v cc max767 figure 4. boost supply for high-side gate driver
oscillator frequency the sync input controls the oscillator frequency. connecting sync to gnd or to v cc selects 200khz operation; connecting it to ref selects 300khz opera- tion. sync can also be driven with an external 240khz to 350khz cmos/ttl source to synchronize the inter- nal oscillator. normally, 300khz operation is chosen to minimize the inductor and output filter capacitor sizes, but 200khz operation may be chosen for a small (about 1%) increase in efficiency at heavy loads. internal reference the internal 3.3v bandgap reference (ref) remains active, even when the switching regulator is turned off. it can furnish up to 5ma, and can be used to supply memory keep-alive power or for other purposes. bypass ref to gnd with 0.22?, plus 1?/ma of load current. applications information and __________________design procedure most users will be able to work with one of the standard application circuits; others may want to implement a circuit with an output current rating that lies between or beyond the standard values. if you want an output current level that lies between two of the standard application circuits, you can interpolate many of the component values from the values given for the two circuits. these components include the input and output filter capacitors, the inductor, and the sense resistor. the capacitors must meet esr and rip- ple current requirements (see input filter capacitor and output filter capacitor sections). the inductor must meet the required current rating (see inductor section). you may use the rectifier and mosfets specified for the circuit with the greater output current capability, or choose a new rectifier and mosfets according to the requirements detailed in the rectifier and mosfet switches sections. for more complete information, or for output currents in excess of 10a, refer to the design information in the following sections. inductor, l1 three inductor parameters are required: the inductance value (l), the peak inductor current (i lpeak ), and the coil resistance (r l ). the inductance is: 1.32 l1 = ______________ f x i out x lir where: f = switching frequency, normally 300khz i out = maximum 3.3v dc load current (a) lir = ratio of inductor peak-to-peak ac current to average dc load current, typically 0.3. a higher lir value allows smaller inductance, but results in higher losses and ripple. the highest peak inductor current (i lpeak ) equals the dc load current (i out ) plus half the peak-to-peak ac inductor current (i lpp ). the peak-to-peak ac inductor current is typically chosen as 30% of the maximum dc load current, so the peak inductor current is 1.15 x i out . the peak inductor current at any load is given by: 1.32 i lpeak = i out + __________ 2 x f x l1 the coil resistance should be as low as possible, preferably in the low milliohms. the coil is effectively in series with the load at all times, so the wire losses alone are approximately: power loss = i out 2 x r l in general, select a standard inductor that meets the l, i lpeak , and r l requirements. if a standard inductor is unavailable, choose a core with an li 2 parameter greater than l x i lpeak 2 , and use the largest wire that will fit the core. current-sense resistor, r1 the current-sense resistor must carry the peak current in the inductor, which exceeds the full dc load current. the internal current limiting starts when the voltage across the sense resistors exceeds 100mv nominally, 80mv minimum. use the minimum value to ensure ade- quate output current capability: r1 = 80mv / i lpeak . the low v in /v out ratio creates a potential problem with start-up under full load or with load transients from no- load to full load. if the supply is subjected to these con- ditions, reduce the sense resistor: 70mv r1 = i lpeak since the sense-resistance values are similar to a few centimeters of narrow traces on a printed circuit board, trace resistance can contribute significant errors. to prevent this, kelvin connect the cs and fb pins to the sense resistors; i.e., use separate traces not carrying any of the inductor or load current, as shown in figure 2. max767 5v-to-3.3v, synchronous, step-down power-supply controller ______________________________________________________________________________________ 11
max767 place r1 as close as possible to the max767, prefer- ably less than 10mm. run the traces at minimum spac- ing from one another. if they are longer than 20mm, bypass cs to fb with a 1nf capacitor placed as close as possible to these pins. the wiring layout for these traces is critical for stable, low-ripple outputs (see layout and grounding section). input filter capacitor, c1 use at least 6? per watt of output power for c1. if the 5v input is some distance away or comes through a pc bus, greater capacitance may be desirable to improve the load-transient response. use a low-esr capacitor located no further than 10mm from the mosfet switch (n1) to prevent ringing. the ripple current rating must be at least i rms = 0.5 x i out . for high-current applica- tions, two or more capacitors in parallel may be needed to meet these requirements. the esr of c1 is effectively in series with the input. the resistive dissipation of c1, i rms 2 x esr c1 , can signifi- cantly impact the circuit? efficiency. output filter capacitor, c2 the output filter capacitor determines the loop stability, output voltage ripple, and output load-transient response. stability to ensure stability, stay above the minimum capaci- tance value and below the maximum esr value. these values are: 3 ? c2 > ? r1 and esr c2 < r1 be sure to satisfy both these requirements. to achieve the low esr required, it may be appropriate to parallel two or more capacitors and/or use a total capacitance 2 or 3 times larger than the calculated minimum. output ripple the output ripple in continuous-conduction mode is: v out(rpl) = i out (max) x lir x 1 ( esr c2 + ) 2 x x f x c2 where f is the switching frequency (200khz or 300khz). in idle-mode, the ripple has a capacitive and a resistive component: . 0.0004 x l v out(rpl) (c) = _____________ x 0.89 volts r1 2 x c2 0.02 x esr c2 v out(rpl) (r) = _____________ r1 the total ripple, v out(rpl) , can be approximated as follows: if v out(rpl) (r) < 0.5 v out(rpl) (c) then v out(rpl) = v out(rpl) (c) otherwise v out(rpl) = 0.5 v out(rpl) (c) + v out(rpl) (r) load-transient performance in response to a large step increase in load current, the output voltage will sag for several microseconds unless c2 is increased beyond the values that satisfy the above requirements. note that an increase in capaci- tance is all that? required to improve the transient response, and that the esr requirements don? change. therefore, the added capacitance can be supplied by an additional low-cost bulk capacitor in parallel with the normal low-esr switching-regulator capacitor. the equation for voltage sag under a step load change is: i step 2 x l v sag = ________________________________ 2 x c2 x (v in (min) x dmax - 3.3v) where dmax is the maximum duty cycle. higher duty cycles are possible when the oscillator frequency is reduced to 200khz, since fixed propagation delays through the pwm comparator become a lesser part of the whole period. the tested worst-case limit for dmax is 92% at 200khz or 89% at 300khz. lower inductance values can reduce the filter capacitance requirement, but only at the expense of increased output ripple (due to higher peak currents). 5v-to-3.3v, synchronous, step-down power-supply controller 12 ______________________________________________________________________________________
rc filter for v cc r2 and c4 form a lowpass filter to remove switching noise from the v cc input to the max767. c4 must have fairly low esr (<5 ? ). switching noise can interfere with proper output voltage regulation, resulting in an exces- sive output voltage decrease (>100mv) at full load. overheating during soldering can damage the surface- mount capacitors specified for c4, causing the regula- tion problems described above. take care to heat the capacitor for as short a time as possible, especially if it is soldered by hand. rectifier, d2 use a 1n5817 or similar schottky diode for applications up to 3a, or a 1n5820 for up to 10a. surface-mount equivalents are available from n.i.e.c. with part num- bers ec10qs02 and nsq03a02, or from motorola with part numbers mbrs120t3 and mbrs320t3. d2 must be a schottky diode to prevent the lossy mosfet body diode from turning on. soft-start a capacitor connected from gnd to ss causes the supply? current-limit level to ramp up slowly. the ramp time to full current limit is approximately 1ms for every nf of capacitance on ss, with a minimum value of 10?. typical values for the soft-start capacitor are in the 10nf to 100nf range; a 5v rating is sufficient. the time required for the output voltage to ramp up to its rated value depends upon the output load, and is not necessarily the same as the time it takes for the cur- rent limit to reach full capacity. duty cycle the duty cycle for the high-side mosfet (n1) in con- tinuous-conduction mode is: 100% x ( v out + v n2 ) ___________________ v in - v n1 where: v out = 3.3v v in = 5v v n1 and v n2 = i load x r ds(on) for each mosfet. it is apparent that, in continuous-conduction mode, n1 will conduct for about twice the time as n2. under short- circuit conditions, however, n2 can conduct as much 90% of the time. if there is a significant chance of short circuiting the output, select n2 to handle the resulting duty cycle (see short-circuit duration section). mosfet switches, n1 and n2 the two n-channel mosfets must be ?ogic-level fets; that is, they must be fully on (have low r ds(on) ) with only 4v gate-source drive voltage. for high-current applications, fets with low gate- threshold voltage specifications (i.e., maximum v gs(th) = 2v rather than 3v) are preferred. in addi- tion, they should have low total gate charge (<70nc) to minimize switching losses. for output currents in excess of the five standard appli- cation circuits, placing mosfets with very low gate charge in parallel increases output current and lowers resistive losses. n2 does not normally require the same current capacity as n1 because it conducts only about 33% of the time, while n1 conducts about 66% of the time. short-circuit duration at their highest rated temperatures (+70? or +85?), each of the five standard application circuits will with- stand a short circuit of several seconds duration. in most cases, the max767 will be used in applications where long-term short circuiting of the output is unlikely. if it is desirable for the circuit to withstand a continuous short circuit, the mosfets must be able to dissipate the required power. this depends on physical factors such as the mounting of the transistor, any heat- sinking used, and ventilation provided, as well as the actual current the transistor must deliver. the short- circuit current is approximately 100mv / r1, but may vary by ?0%. cautious design requires that the transistors withstand the maximum possible current, which is i sc = 120mv / r1. n1 and n2 must withstand this current scaled by their maximum duty factors. the maximum duty factor for n1 occurs under high- load (but not short-circuit) conditions, and is approxi- mately v out / v in (min) or about 0.7. the max- imum duty factor for n2 occurs during short-circuit conditions and is: i sc x r ds(on)n2 1 - v in (max) - i sc x r ds(on)n1 which can exceed 0.9. the total power dissipated in both mosfets together is i sc 2 x r ds(on) . max767 5v-to-3.3v, synchronous, step-down power-supply controller ______________________________________________________________________________________ 13
max767 proper circuit operation requires that the short-circuit current be at least i load x (1 + lir / 2). however, the standard application circuits are designed for a short- circuit current slightly in excess of this amount. this excess design current guarantees proper start-up under constant full-load conditions and proper full-load transient response, and is particularly necessary with low input voltages. if the circuit will not be subjected to full-load transients or to loads approaching the full-load at start-up, you can decrease the short-circuit current by increasing r1, as described in the current-sense resistor section. this may allow use of mosfets with a lower current-handling capability. heavy-load efficiency losses due to parasitic resistances in the switches, coil, and sense resistor dominate at high load-current levels. under heavy loads, the max767 operates deep in the continuous-conduction mode, where there is a large dc offset to the inductor current (plus a small sawtooth ac component) (see inductor section). this dc current is exactly equal to the load current, a fact which makes it easy to estimate resistive losses via the simplifying assumption that the total inductor current is equal to this dc offset current. the major loss mecha- nisms under heavy loads, in usual order of importance, are: ? 2 r losses gate-charge losses diode-conduction losses transition losses capacitor-esr losses losses due to the operating supply current of the ic. inductor-core losses, which are fairly low at heavy loads because the ac component of the inductor cur- rent is small, are not accounted for in this analysis. p out efficiency = ______ x 100% = p in p out _______________ x 100% p out + pd total pd total = pd (i 2 r) + pd gate + pd diode + pd tran + pd cap + pd ic i 2 r losses pd (i 2 r) = resistive loss = (i load 2 ) x (r coil + r ds(on) + r1) where r coil is the dc resistance of the coil and r ds(on) is the drain-source on resistance of the mos- fet. note that the r ds(on) term assumes that identical mosfets are employed for both the synchronous recti- fier and high-side switch, because they time-share the inductor current. if the mosfets are not identical, esti- mate losses by averaging the two individual r ds(on) terms according to their duty factors: 0.66 for n1 and 0.34 for n2. gate-charge losses pd gate = gate driver loss = q g x f x 5v where q g is the sum of the gate charge for low- and high-side switches. note that gate-charge losses are dissipated in the ic, not the mosfets, and therefore contribute to package temperature rise. for a pair of matched mosfets, q g is simply twice the gate capaci- tance of a single mosfet (a data sheet specification). diode conduction losses pd diode = diode conduction losses = i load x v d x t d x f where v d is the forward voltage of the schottky diode at the output current, t d is the diode? conduction time (typically 110ns), and f is the switching frequency. transition losses pd tran = transition loss = v in 2 x c rss x i load x f ______________________ i drive where c rss is the reverse transfer capacitance of the high-side mosfet (a data sheet parameter), f is the switching frequency, and i drive is the peak current available from the high-side gate driver output (approx- imately 1a). additional switching losses are introduced by other sources of stray capacitance at the switching node, including the catch-diode capacitance, coil interwind- ing capacitance, and low-side switch drain capaci- tance, and are given as pd sw = v in 2 x c stray x f, but these are usually negligible compared to c rss losses. the low-side switch introduces only tiny switching loss- es, since its drain-source voltage is already low when it turns on. 5v-to-3.3v, synchronous, step-down power-supply controller 14 ______________________________________________________________________________________
capacitor esr losses pd cap = capacitor esr loss = i rms 2 x esr where i rms = rms ac input current, approximately i load / 2. note that losses in the output filter capacitors are small when the circuit is heavily loaded, because the current into the capacitor is not chopped. the output capacitor sees only the small ac sawtooth ripple current. ensure that the input bypass capacitor has a ripple current rat- ing that exceeds the value of i rms . ic supply-current losses pd ic is the quiescent power dissipation of the ic and is 5v times the quiescent supply current (a data sheet parameter), or about 5mw. light-load efficiency under light loads, the pwm will operate in discontinu- ous-conduction mode, where the inductor current dis- charges to zero at some point during each switching cycle. new loss mechanisms, insignificant at heavy loads, begin to become important. the basic difference is that in discontinuous mode, the ac component of the inductor current is large compared to the load current. this increases losses in the core and in the output filter capacitors. ferrite cores are recommended over pow- dered-material types for best light-load efficiency. at light loads, the inductor delivers triangular current pulses rather than the nearly square waves found in continuous-conduction mode. these pulses ramp up to a point set by the idle-mode current comparator, which is internally fixed at approximately 25% of the full-scale current-limit level. this 25% threshold provides an opti- mum balance between low-current efficiency and out- put voltage noise (the efficiency curve would actually look better with this threshold set at about 45%, but the output noise would be too high). ____additional application circuits high-accuracy power supplies the standard application circuit? accuracy is dominat- ed by reference voltage error (?.8%) and load regula- tion error (-2.5%). both of these parameters can be improved as shown in figures 5 and 6. both circuits rely on an external integrator amplifier to increase the dc loop gain in order to reduce the load regulation error to 0.1%. reference error is improved in the first circuit by employing a version of the max767 (? grade) which has a ?.2% reference voltage tolerance. reference error of the second circuit is further improved by substituting a highly accurate external ref- erence chip (max872), which contributes ?.38% total error over temperature. these two circuits were designed with the latest gener- ation of dynamic-clock ?s in mind, which place great demands on the transient-response performance of the power supply. as the ? clock starts and stops, the load current can change by several amps in less than 100ns. this tremendous ? i/ ? t can cause output voltage overshoot or sag that results in the cpu vcc going out of tolerance unless the power supply is carefully designed and located close to the cpu. these circuits have excellent dynamic response and low ripple, with transient excursions of less than 40mv under zero to full-load step change. in particular, these two circuits support the ?r?(voltage regulator) version of the intel p54c pentium cpu, which requires that its supply voltage, including noise and transient errors, be within the 3.30v to 3.45v range. to configure these circuits for a given load current requirement, substitute standard components from table 1 for the power switching elements (n1, n2, l1, c1, c2) or use the design procedure . r1 can also be taken from table 1, but must be adjusted approximate- ly 10% higher in order to maintain the correct current- limit threshold. this increased value is due to the 0.9 gain factor introduced by the h-bridge resistor divider (r3?6). if the remote sense line must sense the output voltage on the far side of a connector or jumper that has the possibility of becoming disconnected while the power supply is operating, an additional 10k ? resistor should connect the sense line to the output voltage in the con- nector? power-supply side in order to prevent acciden- tal overvoltage at the cpu. for applications that are powered from a fixed +12v or battery input rather than from +5v, use a max797 ic instead of the max767. the max797 is capable of accepting inputs up to 30v. see the max796?ax799 data sheet for a high-accuracy circuit schematic. max767 5v-to-3.3v, synchronous, step-down power-supply controller ______________________________________________________________________________________ 15
max767 5v-to-3.3v, synchronous, step-down power-supply controller 16 ______________________________________________________________________________________ 3.38v output 3.427v max 3.330v min dl gnd on max767t v cc dh ref l1 bst lx d2 pgnd cs fb shutdown on/off n1 n2 d1 c2 r1 c6 0.01 f c1 sync r2 10 ? c4 4.7 f ss to max767 v cc r9 332k, 1% r8 10k r10 8.06k, 1% r3 1k, 1% r4 1k, 1% r6 10k, 1% r5 10k, 1% c7 10 f ceramic (locate at p pins) r11 5.1k min load c5 0.01 f c3 0.1 f c9 0.22 f c10 0.01 f (optional) c8 620pf input 4.75v to 5.5v v out = v ref ( r10 + 1 ) r9 max495 remote sense line r7 330k figure 5. high-accuracy cpu power supply with internal reference
max767 5v-to-3.3v, synchronous, step-down power-supply controller ______________________________________________________________________________________ 17 3.38v output 3.408v max 3.369v min dl gnd on max767 v cc dh ref l1 bst lx d2 pgnd cs fb shutdown on/off n1 n2 d1 c2 r1 c6 0.01 f c1 sync r2 20 ? c4 22 f ss r9 332k, 0.1% r8 10k r10 118k, 0.1% r3 1k, 1% r4 1k, 1% r6 10k, 1% r5 10k, 1% c7 10 f ceramic (locate at p pins) r11 5.1k min load c5 0.01 f c3 0.1 f c10 0.01 f (optional) c8 1000pf input 4.75v to 5.5v v out = v ref ( r10 + 1 ) r9 max495 remote sense line r7 330k gnd vin vout max872 to max767 v cc c9 0.22 f figure 6. high-accuracy cpu power supply with external reference
max767 5v-to-3.3v, synchronous, step-down power-supply controller 18 ______________________________________________________________________________________ ___________________chip topography ordering information (continued) transistor count: 1294 substrate connected to gnd bst gnd gnd ref on gnd v cc 0.181" (4.597mm) 0.109" (2.769mm) gnd gnd gnd sync pgnd v cc v cc v cc dl lx ss cs fb dh 3.3 ?.2% 20 ssop -40? to +85? max767teap 3.6 3.45 3.3 v out (v) ?.8% ?.8% ?.8% ref tol 20 ssop -40? to +85? max767seap 20 ssop -40? to +85? max767reap 20 ssop -40? to +85? max767eap pin- package temp. range part
max767 5v-to-3.3v, synchronous, step-down power-supply controller ______________________________________________________________________________________ 19 ________________________________________________________package information l dim a a1 b c d e e h l min 0.068 0.002 0.010 0.005 0.278 0.205 0.301 0.022 0? max 0.078 0.008 0.015 0.009 0.289 0.212 0.311 0.037 8? min 1.73 0.05 0.25 0.13 7.07 5.20 7.65 0.55 0? max 1.99 0.21 0.38 0.22 7.33 5.38 7.90 0.95 8? inches millimeters 20-pin plastic shrink small-outline package h e d a a1 c 0.127mm 0.004in. b 0.65 bsc 0.0256 bsc 21-0003a e

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